High Temperature and Width Influence on the GIDL of Nanowire and Nanosheet SOI nMOSFETs

In this work, an experimental evaluation of Gate-Induce Drain Leakage (GIDL) current is presented for nanowire and nanosheet-based SOI transistors. The effects fin width temperature increase are studied. Obtained results indicate that the in device makes GIDL more sensitive to increase. Three-dimensional numerical simulations have shown despite reverse junction leakage with temperature, nanosheet transistors composed predominantly current. change valence conduction bands caused by favors band-to-band tunneling, which responsible worsening at high temperatures.